So, I've got this fancy sensor that returns 24-bit data with its internal sigma-delta ADC.
I've bit-bashed my own SPI subroutines to send and receive data.
The crunch has come while converting the raw sensor data to useful real-world numbers.
There are offsets and scaling factors that need to be applied, and the intermediate calculations require 58 bits.
I can't see a way of simplifying the calculations to remain in 32-bits integer without underflow and/or overflow, although I'm not done yet.
It would be "nice" to have a long multiply and divide, that could take a register-pair (lets say, ram1.ram2).
So I could do (lets say)
mul32 var1 ram3 (implied result into ram1 (bits 63-32) and ram2 (bits 31-0))
and
div ram3 ram4 (divides long register pair ram1.ram2 by ram3 and puts the result in ram4)
While we're at it, a divide that can put the non-integer part in a register would be good. (Wait, did we end up with a working modulo?
so modulo 17 3 would put the remainder (17/3=5, remainder=2) somewhere?)
Is this realistic or simply too much for the poor WC8 ?
I've bit-bashed my own SPI subroutines to send and receive data.
The crunch has come while converting the raw sensor data to useful real-world numbers.
There are offsets and scaling factors that need to be applied, and the intermediate calculations require 58 bits.
I can't see a way of simplifying the calculations to remain in 32-bits integer without underflow and/or overflow, although I'm not done yet.
It would be "nice" to have a long multiply and divide, that could take a register-pair (lets say, ram1.ram2).
So I could do (lets say)
mul32 var1 ram3 (implied result into ram1 (bits 63-32) and ram2 (bits 31-0))
and
div ram3 ram4 (divides long register pair ram1.ram2 by ram3 and puts the result in ram4)
While we're at it, a divide that can put the non-integer part in a register would be good. (Wait, did we end up with a working modulo?
so modulo 17 3 would put the remainder (17/3=5, remainder=2) somewhere?)
Is this realistic or simply too much for the poor WC8 ?