AceCannon,
you are right, whether you home run using the ELK 6-wire style with a M1DBH (which is what I do) or you put all the device in "series" in a more traditional way, all A connections are connected by the same conductor (i.e. on the same copper line) and same for B. So this whole issue of connecting in series is not a logical/functional requirement.
It is however an electrical "requirement" in that the RS485 bus is meant to be terminated and have a specific impedance and the drivers and receivers on the bus take advantage of this. This means that the quality of the signals will be much better. Note that since it is a signal quality issue, you'll find that, especially on small distances, you can mess up the topology and termination and it'll still work, but you're eating into your signal margin, so it's always a good idea to "do it by the book" to reduce the probability of issues due to poor signal integrity.
Now, what's the deal with the "star" or "series" topology? The termination requirement is that each data line of the bus (A and B ) basically looks like one long wire with one termination at each end (and there 2 ends given that it's one wire) and stubs as short as possible to connect the long wire to the devices. The stubs disrupt the impedance of the line, so they have to be kept as short as possible.
The "series" topology implements the requirement above by having the one line consist of the the concatenation of all the segments between devices, with two of the devices being at the ends and requiring termination. The "stubs" in that case are just the 1-2 inches of board trace between the blue connectors and the atual RS485 chips.
The "star" topology using the M1DBH or you own cabling is not at all a star. There is a line starting from the center and coming back (Ain/Aout), but all the lines are _not_ all connected in the center. Instead, a device like the M1DBH connects Aout of device n with Ain of device n+1. So really, you're again creating one long line that happens to physically come back to the center after each device, but is not electrically shorted at the center of the star. It really is a "series" scheme again. In essence, the connection looks like:
Term <> M1DBH0 <> Dev1 <> M1DBH1 <> Dev2 <> M1DBH2 <> Term
While M1DBH0, M1DBH1 and M1DBH2 are physically collocated on the M1DBH board, they are not electrically connected. And now it's clear that each device (Devn) is connected twice to the M1DBH, thus requiring in and out wires for each of A and B.
Note that the whole termination thing is very common. Most high-speed buses around are carefully terminated. PCIe, DDR2/3... They couldn't live without termination. On an unterminated bus, when a signal transitions at one end, it propagates to the other end, and when it encounters an unterminated end, it fully reflects against it (like a wave on a wall), going back to where it came from, where it'll eventually either keep reflecting on the ends, or will get somewhat absorbed by the driver of the signals if it's designed for that. The various extra voltage added/subtracted by the reflections to the original signal is called ringing and is the source of all troubles. In all cases, the signal will _eventually_ settle throughout the line at the desired value, but not after some time. In slow buses (like RS485), the ringing causes confusion on the signal levels. On high-speed buses (and very long buses, as RS485 can be), the ringing of one piece of data interferes with the next piece of data (causing ISI or inter symbol interference).
Some buses like the original PCI are unterminated on purpose and survive it, but they tend to be high-but-not-very-high speed and short. It also means that the timing is tough and the drivers/receivers have to withstand much higher voltage for short period of time (e.g. PCI3.3V requires 7V tolerance). On a PCI bus, the bus itself tends to be short compared to the "stubs" (in that case the path from the connectors to the chips on the board) which creates impedance discontinuities everywhere and makes proper termination difficult. Similar issues apply to much faster DDR2/3, but these don't have the luxury of the option of an unterminated bus given the frequencies, but the terminations are tough because there are several devices on the same line. So they end up using dynamic termination inside the devices that turn on/off in a well choreographed way to absorb the signals and have the receivers receive the value that was intended to be sent by the senders. Lots of fun.
Laurent
